1. Field of the Invention
The invention relates to an operational amplifier-based voltage multiplier circuit (implemented as an integrated circuit) having variable operational feedback or series input resistance, and preferably control circuitry for controlling the resistance to cause the circuit to assert a desired output voltage in response to a given input voltage. In a class of embodiments, the invention is an integrated memory circuit including an operational amplifier-based circuit of this type for asserting a desired output voltage for use in memory operations (e.g., for use as a reference voltage by a sense amplifier in reading one or more cells of a memory array).
2. Description of Related Art
Operational amplifiers (op amps) having conventional design have been used in many circuits, including integrated circuits. It is well known to construct a noninverting amplifier by connecting an operational feedback resistor between the output terminal of an op amp and a first input terminal of the op amp, and also connecting a second resistor (a series input resistor) between the first input terminal and ground. With such operational feedback resistor and series input resistor connected to the op amp as described (because the input impedance at each input terminal of the op amp is extremely high), the output voltage (Vout) at the output terminal of the op amp is (to a good approximation): Vout=(R1+R2)/R2!Vref, where input voltage Vref is asserted to the non-inverting input terminal of the op amp, R1 is the resistance of the operational feedback resistor, R2 is the resistance of the series input resistor, and the inverting input terminal of the op amp is connected to ground through the series input resistor.
One aspect of the invention is an improved integrated circuit implementation of an op amp circuit including a variable operational feedback resistor (or a variable series input resistor), and control circuitry for controlling the variable resistance to cause the op amp circuit to assert a selected output voltage in response to a given input voltage and control bits. In preferred embodiments, each set of control bits determines a binary control word whose binary value has a simple functional relation to the value of the output voltage selected thereby.
It is also well known to implement a memory chip to include an array of memory cells arranged in rows and columns, and a control means for controlling memory operations (including the operations of programming, reading, and erasing the memory cells). It is also known to implement such a memory chip with non-volatile data storage units such as those described in U.S. patent application Ser. No. 08/508,864, entitled NON-VOLATILE DATA STORAGE UNIT AND METHOD OF CONTROLLING SAME, filed Jul. 28, 1995, in U.S. patent application Ser. No. 08/508,921, entitled MEMORY SYSTEM HAVING PROGRAMMABLE FLOW CONTROL REGISTER, filed Jul. 28, 1995, and in U.S. patent application Ser. No. 08/508,923, entitled MEMORY SYSTEM HAVING NON-VOLATILE DATA STORAGE STRUCTURE FOR MEMORY CONTROL PARAMETERS AND METHOD, filed Jul. 28, 1995, the contents of each of which are incorporated herein by reference. Such nonvolatile data storage units can store control parameter data used by the control means for controlling memory operations. The control parameter data can include data determining parameters for adjusting the magnitude and duration of voltage pulses applied to the memory for carrying out programming and erasing operations, or for adjusting the magnitude of a reference voltage supplied to the system's sense amplifiers. The control parameter data are preferably stored in data storage structures which are separate from the array of memory cells. The data storage structures preferably include a data storage unit for storing each of the control parameters.
It would be desirable to include an op-amp-based voltage source in a memory chip, if such voltage source were designed to be controllable to output any of a variety of selected, stable output voltages. It would also be desirable to design such a variable voltage source to be efficiently controllable to output each of the selected output voltages in response to a different binary control word (preferably with the selected output voltage having a simple functional relation to the binary value of the control word).
Another aspect of the invention is a memory chip including an op amp circuit (including a variable operational feedback resistor or variable series input resistor) and means for controlling the variable resistance of the op amp circuit to cause the op amp circuit to assert a selected one of a set of output voltages for use in one or more memory operations. The op amp circuit outputs each selected output voltage in response to a different binary control word. The memory chip preferably includes non-volatile data storage units which store bits of the binary control words. In preferred embodiments in which the memory chip includes a sense amplifier, the sense amplifier uses each selected output voltage asserted by the op amp circuit as a reference voltage during reading, programming, or erasing of all or some cells of a memory array.